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ESD protection solution for high-resolution panel MIPI C-PHY

2023/06/09

Design Trends of Display Panels for Tablet Computers --- Pursuit of High Resolution and High Frame Rate


With the vigorous development of information technology in recent years, the positioning of tablet computers for consumers has gradually changed from "big screen mobile phones" to "portable computers". In addition to entertainment purposes, many users also regard tablet computers as a money-making tool that can improve work efficiency. Therefore, the specification requirements for tablet computers are getting higher and higher. Among them, the convenience of drawing and video production and viewing, and whether tablet computers come with a display panel with high resolution and high frame rate have become important indicators when consumers choose a tablet computer. As a result, panel designers need to optimize panel resolution specifications.



AR, VR Display Panel Specification Requirements


AR and VR devices are important hardware equipment for the realization of the metaverse concept. Although the size of the panel modules is relatively small, but because they are quite close to the user's eyeballs in practical applications, hence, users can distinguish the high or low display resolution more intuitively. In order to provide users with a more realistic experience environment, even a relatively small panel module must be designed with a relatively high resolution, and it is already quite common to achieve 2K or even higher resolution specifications in a panel with a size of only 2 inches.



MIPI C-PHY --- Brand New and Supports High-Resolution Display Transmission Interface


The panels used in tablet computers, AR, and VR devices still use MIPI DSI (Display Serial Interface), the physical layer stipulated by the MIPI Alliance, as the mainstream image transmission interface. After the introduction of the MIPI DSI specification, MIPI D-PHY has higher data transmission capacity and fewer wiring than conventional LVDS. Benefiting from the advantages of these two key specifications, MIPI D-PHY quickly replaced conventional LVDS to become the dominating communications interface for small-sized panel drivers.


As mentioned above, in response to the increasing resolution specifications of tablet computers, AR and VR devices in recent years, the maximum data transmission capacity of MIPI D-PHY is gradually insufficient, so the MIPI Alliance proposed an updated MIPI DSI physical layer C-PHY to provide a more optimized transmission interface, and optimize the transmission interface of high-end display panels to achieve high resolution and high frame rate specifications.


Different from the previous transmission architecture of high-speed differential pairs, MIPI C-PHY adopts special 3-phase encoding technology and integrates timing control into high-speed data line, which is different from the configuration of MIPI D-PHY’s 8 high-speed differential pairs and 2 wires of timing control signals. MIPI C-PHY uses 3 wires as a pair, and a total of 3 pairs of 9 transmission wires realizes the hardware structure of the physical layer. Compared with MIPI D-PHY, although there is one less transmission wire, the maximum supported transmission speed has been increased to 17.1Gbps. Refer to Figure 1 for the comparison of MIPI D-PHY and C-PHY hardware specifications.

Parameter C-PHY D-PHY
Minimum # of Pins34
Typical # of Pins910
Max. TX Voltage SwingLP: 1.3Vp
HS: 0.36Vp
LP: 1.3Vp
HS: 0.425Vp
Data Rate/Lane5.7Gbps2.5Gbps
Bandwidth/Port 17.1Gbps 10Gbps

Figure 1. Specification comparison of MIPI D-PHY and MIPI C-PHY


Challenges in ESD Testing and Verification of Panel Modules


In response to the fact that panel modules will encounter quite frequent wire plugging and unplugging during production line function verification and assembly, and will therefore be exposed to a high risk of ESD damage, prompting panel design manufacturers to use strict ESD testing methods to ensure its ESD tolerance. In the electrostatic test, in addition to the Contact and Air discharge for the panel casing, some brand manufacturers will also require the Direct Pin Injection test for each signal and power cable of the FPC connector to ensure that the cable will not be damaged when the Cable Discharge Event is encountered during plugging and unplugging.


When the panel module is tested by ESD Direct Pin Injection, if adequate ESD protection measures are not taken, the panel will often be damaged and cause an unrecoverable black screen abnormality. However, the cause of panel damage caused by ESD does not necessarily come from the damage of the panel driver IC. More often, it is because the anisotropic conductive film (ACF) connecting the FPC and the driver IC is broken and the panel driving signal cannot be transmitted to the driver IC normally. Even if this failure mode can be repaired by laser re-bonding, how to prevent ACF and Display Driver IC from being damaged by ESD energy is still a serious issue for panel design engineers.   



Amazing Optimized ESD Protection Solution for MIPI C-PHY --- AZ1253-03F.


In order to ensure a sound ESD protection solution for panel ACF and Display Driver IC, Amazing Microelectronic Corp. has developed the industry's first 3-channel TVS solution --- AZ1253-03F for the special application design of MIPI C-PHY 3-phase symbol encoding --- Specifications are as follows:


Package: DFN2010P5E (3 channels)

Directivity: Uni-Direction

Reverse Stand-off Voltage: 3.3V

Capacitance: 0.5pF

ESD Clamping Voltage @8kV: 8.5V

IEC61000-4-2 System ESD: 25kV (Contact), 27kV (Air)

Surge Ipp (8/20µs): 8A


Since the current mainstream multi-channel TVS solution is designed for differential pairs with even pairs, therefore, it cannot be applied to the application of MIPI C-PHY, which also leads design engineers to choose single-channel protection components when selecting the ESD protection solution of MIPI C-PHY. The AZ1253-03F adopts a special three-channel design, and adopts the Center GND pin structure to match the definition of connector pin of MIPI C-PHY, which can ensure that the PCB layout can provide a more simplified layout design by the feed through method. For the layout of AZ1253-03F in MIPI C-PHY, please refer to Figure 2 below.

Figure 2. The layout design reference of AZ1253-03F in MIPI C-PHY

Figure 2. The layout design reference of AZ1253-03F in MIPI C-PHY


In order to simultaneously consider the signal integrity of MIPI C-PHY high-speed signals, and the occasional EOS failure problem when panels are applied to production lines, the AZ1253-03F has only 0.5pF parasitic capacitance in the specification design, and ensures Surge Robustness Ipp (8 /20µs) up to 8A to reduce the defect rate of EOS in the production line. In addition, in order to pass the harsh ESD Direct Pin Injection of the panel, the ESD Clamping Voltage of AZ1253-03F is only 8.5V @8kV to ensure that the ACF and Display Driver IC can still be well protected under ESD impact. Please refer to Figure 3 below for the ESD Clamping Voltage of AZ1253-03F. 


Figure 3. AZ1253-03F TLP characteristic curve

Figure 3. AZ1253-03F TLP characteristic curve


As consumers pursue higher resolution and higher frame rates for tablet computers and AR and VR devices, panel module designers must transition the driver interface from MIPI D-PHY to MIPI C- PHY. With the special design of AZ1253-03F tailored to the various specifications required by MIPI C-PHY, it can provide stronger system-level ESD tolerance to the increasing demand of high-resolution panels in the market and avoid repairs caused by EOS damage. And at the same time, it can simplify the hardware layout design of MIPI C-PHY, thereby addressing the dilemma that panel design engineers may encounter during the design phase, and accelerating the product's time-to-market.

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