Display panel suppliers have made a significant progress in the protection against electrostatic discharge (ESD), resulting in minimized damage in panel products due to ESD events during testing, production or later usage. On the other hand, there has been one report of EOS damage in products after another. The damage caused by an EOS event is often physical and permanent. For example, I/O-GND short-circuiting has been reported in T-CON chips or driver ICs, or even overheating due to energizing a long period of time after short-circuiting, which burns the internal chips or the module itself and leads to eventually serious customer complaints.
I. Why EOS occurs and its test criteria
EOS occurs for many reasons, and not only during production and testing, but also frequently as the products are being used every day. Some common examples are plugging and unplugging a live power plug, instantaneous switching of power switch, or magnetic field interference due to lightning strike can couple an EOS event to products. With the display penal as an element in a product, EOS more often comes from the coupling interference from the motherboard or test equipment. The live test during production is, of course, an EOS source; for example, a worker yanks a connector off while it is still live or inserts an incorrect adapter board by mistake.
When it comes to EOS testing and simulation, the most widely used standard is IEC 61000-4-5 for lightning and surge simulation tests. For a penal display product, low-voltage surge simulation test is always specified, since direct lightning interference is unlikely a cause of EOS event. The commonly used test waveforms are 1.2/50μs for voltage and 8/20μs for current, and the most common test equipment equivalent output impedance is 2Ω; i.e., when test equipment feeds a 10V surge voltage, the theoretical maximum pulse current is 5A. In the IEC 61000-4-5 test standard file, however, only the specifications of test equipment and environment are provided, and not the substantial and unified standard test voltage. That’s why customers usually specify a surge voltage level corresponding to product models and application scenarios. Among a massive number of customer-supplied test specifications, Amazing Microelectronics summarizes the following test criteria commonly used in penal testing:
1. The test criteria for surge voltage commonly used for high-speed signal communication lines are 11V ~ 25V (8/20μs by 2Ω), and the commonly used test interfaces are LVDS, V-by-one(VBO), MIPI, eDP and Touch SPI / I2C.
2. The test criteria for surge voltage commonly used for power lines are 15V ~ 40V (8/20μs by 2Ω), and the commonly used test power signals are DVDD, VDD1V8, VDDIO, VCI, VCC, ELVSS/ELVDD, AVDD, VSP/VSN and VGH/VGL; however, owing to the wide diversity of penal products, the power line test level can be higher depending on products. For example, 90V may be required for TCON or Driver IC 3.3V VCC/VDD power line in certain TV or monitor products.
Of course, suppliers will not just stay with finishing the existing basic test levels. Most of them will increase the test voltage until the tested module circuit fails after complying with the customer-specified test criteria, and document the maximum surge voltage of the circuit for internal reference. These maximum surge voltages documented are then used to compare between IC models and TVS protection solutions for constant improvement of EOS test criteria.
II. Recommended EOS protection solutions
When selecting a TVS solution, the maximum level of surge voltage that the TVS itself can survive is estimated based on the IPP current of TVS product. With the equipment output waveform of 8/20μs by 2Ω, the maximum surge protection voltage of TVS is expressed as Vsurge = IPP*2Ω+Vc_surge, where Vc_surge is the clamping voltage during the surge test. The lower this voltage is, the more capable TVS is of preventing rear-end ICs from breaking down by surge voltage; i.e., better TVS protection. Amazing Microelectronics has an extensive range of TVS solutions for penal products, and the following are some of the popular selections:
1. For the protection of signal transmission lines, the capacitance parameter should not be too high for TVS products, and again the IPP current shall be large enough. The recommended solutions are DFN2510-packaged AZ1013-04F and AZ1213-04F or SOT23-6-packaged AZ1513-04S for LVDS port; DFN2510-packaged AZ1243-04F for V-by-one(VBO), MIPI and eDP; and DFN1006-pakaged AZ5515-02F for Touch SPI / I2C.
Part No. | Application | Package | Cap. (pF Typ.) |
VRWM (V) |
VC_ESD (V) @8kV |
VC_SURGE (V) @5A |
IPP (A) |
AZ1013-04F | LVDS | DFN2510P10E | 2 | 3.3 | 7.8 | 5.2 | 15 |
AZ1213-04F | LVDS | DFN2510P10E | 2.1 | 3.3 | 6.5 | 5.2 | 20 |
AZ1513-04S | LVDS | SOT23-6L | 2 | 3.3 | 7.5 | 5.8 | 30 |
AZ1243-04F | VBO/MIP/eDP | DFN2510P10E | 0.5 | 3.3 | 8.5 | 6.5 | 7.5 |
AZ5515-02F | I2C/SP | DFN1006P3x | 0.8 | 5 | 10 | 7 | 11 |
Table 1. TVS protection solution parameters (for signal lines)
2. For power line protection, the choice is a product with a suitable IPP current and lower clamping voltage. There are many power lines and they carry high and low voltages. Amazing Microelectronics had prepared a series of products for various operating voltages for the selection by customers. For medium-sized and large panels frequently seen in TVs, monitors, notebooks and tablets, the recommended TVS solutions are DFN1610(0603)-package products; for small panels in smart watches and mobile phones, the recommended TVS solutions are those of small package of DFN1006(0402) or micro-package of CSP0603(0201).
Part No | Application | Package | VRWM (V) | VC_ESD(V) @8kV | VC_Surge (V) @5A | IPP (A) |
AZ6112-01F | 1.2V Power | DFN1006P2E | 1.2 | 5 | 3.5 | 12 |
AZ6118-01F | 1.8V Power | DFN1006P2X | 1.8 | 4.5 | 4.2 | 15 |
AZ6518-01F | 1.8V Power | DFN1610P2E | 1.8 | 3.6 | 3.0 | 65 |
AZ6A25-01B | 2.5V Power | CSP0603P2Y | 2.5 | 4.5 | 4.0 | 16 |
AZ6225-01F | 2.5V Power | DFN1006P2E | 2.5 | 5 | 4 | 20 |
AZ6425-01F | 2.5V Power | DFN1610P2E | 2.5 | 4 | 3 | 80 |
AZ5A03-01M | 3.3V Power | MCSP0603P2YS | 3.3 | 4.5 | 4.5 | 36 |
AZ5883-01F | 3.3V Power | DFN1006P2E | 3.3 | 5 | 4.5 | 42 |
AZ3103-01F | 3.3V Power | DFN1610P2E | 3.3 | 4.8 | 5.3 | 80 |
AZ5A15-01M | 5V Power | MCSP0603P2YS | 5 | 6.5 | 6.5 | 25 |
AZ5815-01F | 5V Power | DFN1006P2E | 5.5 | 6 | 5.5 | 40 |
AZ3105-01F | 5V Power | DFN1610P2E | 5 | 6 | 6.4 | 80 |
AZ4A07-01B | 7V Power | CSP0603P2Y | 7 | 13.5 | 11 | 7 |
AZ4107-01F | 7V Power | DFN1006P2X | 7 | 10 | 9.2 | 12 |
AZ4507-01F | 7V Power | DFN1610P2E | 7 | 10 | 8.5 | 100 |
AZ4308-01M | 8V Power | MCSP1006P2YS | 7.9 | 8.8 | 8.2 | 35 |
AZ4510-01F | 10V Power | DFN1610P2E | 10 | 13 | 12.5 | 80 |
AZ4512-01F | 12V Power | DFN1610P2E | 12 | 15 | 14.5 | 38 |
AZ4514-01F | 14V Power | DFN1610P2E | 14 | 18 | 17.5 | 32 |
AZ4516-01F | 16V Power | DFN1610P2E | 16 | 20.5 | 21 | 60 |
AZ4520-01F | 20V Power | DFN1610P2E | 20 | 25.5 | 25.5 | 24 |
AZ4524-01F | 24V Power | DFN1610P2E | 24 | 30 | 30 | 50 |
AZ4528-01F | 28V Power | DFN1610P2E | 28 | 34.5 | 35 | 45 |
AZ4536-01F | 36V Power | DFN1610P2E | 36 | 44 | 45 | 14 |
Table 2. TVS protection solution parameters (for power lines)
It is the general direction, as well as an indispensable ability in suppliers for greater product competitiveness, to constantly increase the EOS protection level in products and improve EOS protection design in order to maintain and improve product reputation and values. Amazing Microelectronics has rich experience in ESD and EOS protection for the design goals today and tomorrow. We are dedicated to preventing the increasing vulnerability of main chips as the manufacturing process evolves and helping every customer create their perfect products.