The Comparison between ESD Test of System Products (ESD Gun) and ESD Test of Component Device (HBM)

Introduction

Today, the trend of consuming products is constantly increasing the features and shrinking the size of the product. When the product includes more functions, the input/output port also increases at the same time. Therefore, the system of product is interfered more easily by ESD and damaged to internal integrated circuit. Besides, the size of consuming and portable electronic products is getting smaller with the trend of CMOS IC toward high speed, high integration, and low cost. The economic profit is raised but the issue of electronic product reliability cannot be neglected. 

The integrated circuit fabricated by advanced process technology has thinner gate oxide layer. The IC can be damaged easily by ESD, especially for deep sub-micron CMOS process. Due to the low breakdown voltage of gate oxide layer, the operated voltage range of ESD protection circuit is getting smaller and smaller. Therefore, it is necessary to focus on the issue of ESD. The ESD protection circuit definitely plays an important role for high-end and delicate electronic equipment.The Basic Concept of ESD

The Basic Concept of ESD

ESD is the abbreviation of Electrostatic Discharge. ESD is a phenomenon of charge re-distribution when a charged object contacts with another object. In the normal life, ESD is everywhere and ESD event also happens often. For example, when we walk on the carpet and open the metal door knob, we would be shocked due to instant discharging event. Or we would take the charge when we take off the sweater in the cold winter. Then we would get an electric shock if we touched any object that can instantly discharge the charge. 

For electronic products, ESD is always a problem that is not easy to solve. The electronic products would be at unstable situation when the products are stressed by ESD. It only need to reboot for light case, severe case may lead to permanent damage to the internal electronic components. Although we do not feel the body heat generated by electrostatic discharge, but the heat of sophisticated integrated circuit, it is great, so that heat can melt or vaporize some electronic elements. Thus the ESD protection circuit plays a very important role to improve the overall reliability of electronic products. 

Table I presents different individuals and how much action will produce static electricity at several manufacturing environment. In general, the phenomenon of electrostatic interactions will be more significant in the dry environment.

Table I  Static value at each environment

Component-Level ESD

According to the different discharge mode, the component-level ESD can be divided into three modes: Human Body Mode (HBM), Machine Mode (MM), and Charged Device Mode (CDM). 

Human Body Mode is because the human body movement or friction accumulation of static electricity. When touching the integrated circuit, ESD is going from circuit pin through circuit main body to GND. Instantaneous discharge current can be an ampere rating within a few hundred nanoseconds (ns) and burns  the integrated circuits. 

Machine Mode is that the charges accumulated in electrostatic equipment itself discharge from pin of integrated circuit via the circuit body and lead to GND. Since the machine is manufactured by metal conductor (equivalent resistance is zero), the discharge time is about a few nanoseconds to a few ten nanoseconds, shorter discharge time than that of human body mode. The destruction of the integrated circuit caused by MM is also more serious. 

Charged Device Mode is that the charge accumulated in an integrated circuit itself due to friction or other factors caused by static build-induction. During assembly, an integrated circuit pin contact to GND, its internal buildup of static electricity is discharged from an integrated circuit. This discharge rate is within a few nanoseconds or even faster. Because the accumulation of static electricity inside the integrated circuit varies from the equivalent capacitance to GND, and the equivalent capacitance also relates to the integrated circuit packaging and display angle, it is more difficult to simulate the Charged Device Mode. 

Three ESD discharge mode above are crucial to semiconductor processing and assembly of electronic products, particularly in the human body mode of the most serious damage to electronic components. Therefore, even if the semiconductor electronic components pass the component-level ESD test in the industry, the final product will continuously be tested by system-level ESD test specification.

Human Body Mode (HBM)

Equivalent circuit of the human body mode is shown in Fig. 1, which is established in accordance with JESD22-A114 element parameter specifications. The main purpose is to simulate the electrostatic discharge occurring in the facility environment of assembly line. This specification uses a 100pF capacitor in series with a 1500 ohm resistor to simulate the production line workers. When workers come into contact with a device under test (DUT), the charges accumulated in the body of the worker will be discharged via a resistor to the DUT.

Fig. 1  The equivalent circuit of human body mode (JESD22-A114)

Discharge waveform of human body mode is shown in Fig. 2. In general, the rise time of the discharge waveform is between about 5 to 10 nanoseconds. 2000 volts discharge voltage would generate in approximately 1.33 amps of peak current, 4000 volts discharge voltage would generate in approximately 2.67 amps of peak current, and so on.

Fig. 2  Discharge waveform of human body mode

The specifications of component-level ESD are listed in Table II. The standard level is only an acceptable range. Current customers always use super grade as the threshold to do evaluation of various ESD protection device.

System-Level ESD

Electronic systems encountered electrostatic discharge event is part of the system-level ESD category. System-level ESD usually occurs because consumers with charges directly contact or access electronic products via holding metal tools. ESD energy is transferred via the many input / output pins of electronic products, chassis, or electromagnetic radiation way into electronic products. Therefore, the electronic products with good ESD protection circuit can avoid the impact of ESD or damage caused by burning. Equivalent circuit of the system-level ESD is shown in Fig. 3, such as the ESD gun when the product is tested in industry, which is established in accordance with IEC 61000-4-2 element parameter specifications. The main purpose is to simulate the ESD during end consumers normally use electronic products. This specification uses a 150pF capacitor in series with a 330 ohm resistor to simulate the consumer discharges to electronic products via metal tools. When consumers with charges come into contact with an electronic product, the charges accumulated in the body of the consumer will be discharged via a resistor to the DUT.

Fig. 3  The equivalent circuit of system-level ESD (IEC 61000-4-2)

Discharge waveform of system-level ESD is shown in Fig. 2. IEC 61000-4-2 defines the rise time of the discharge waveform is between about 700 picoseconds to 1 nanoseconds, and the duration of the pulse is 60 nanoseconds. The discharge peak current can be as high as 30 amps. Therefore, the released energy of system-level ESD is definitely much higher than that of HBM. But more importantly, the adopted ESD device even pass the test according to IEC 61000-4-2 standard, it does not guarantee that the system will be able to pass the test by electrostatic discharge.

Fig. 4  Discharge waveform of system-level ESD

For the situation of system after stressed by ESD, the extent of the affected system is divided into four grades by IEC 61000-4-2. IEC 61000-4-2 recommends that product sourcing verification must meet the acceptable decisions of Class A or Class B, Class C and Class D are not part of the acceptable range, as shown in Table III.

The Comparison between System-Level ESD Test and Component-Level ESD Test

System-level ESD test and component-level ESD test of comparison summary table is shown in Fig. 5. If we compare the main parameters of the HBM with the IEC 61000-4-2, we can observe the following phenomena: 

1. IEC 61000-4-2 test specification for use in end-use applications, consumer electronics products, such as handheld mobile devices, must pass IEC 61000-4-2 Level 4 (± 15kV Air and ± 8kV contact discharge) test conditions. 

2. Comparing the IEC 61000-4-2 Level 4 and the HBM standard level (± 2kV), the discharging current of IEC 61000-4-2 Level 4 is more than twenty times. High discharging current usually results in damage to integrated circuits (damage gate oxide layer of transistor). 

3. Comparing the IEC 61000-4-2 Level 4 and the HBM standard level (± 2kV), the discharging current instantaneous rate of change of IEC 61000-4-2 Level 4 is more than two hundred and fifty times. High discharging current instantaneous rate of change often leads to damage and latch failure to the integrated circuit (latch-up failure).

Fig. 5  Comparison between system-level ESD and component-level ESD

One thing we must understand is that lifting component-level ESD will not improve the performance of system-level ESD because the whole system ESD is related to a broad range of protection technology. These protection techniques include protection devices on the board, the optimization of signal traces, the package of protection device, and the last line of defense ─ component-level ESD protection.

The Trend of ESD Protection

In order to improve the circuit speed to cope with higher speed applications, transistor requires a smaller development dimension. The thickness of the gate oxide layer is also entered into the nanometer level. In 0.1mm process even smaller generations, the gate oxide layer of the transistor becomes extremely thin (less than 1.7 nm). Such a thin thickness results in continuously declining breakdown voltage of transistor gate oxide layer, as shown in Fig. 6.

Fig. 6  Breakdown voltage of oxide layer in deep-submicron integrated circuit

The thin oxide layer reduces the protection device in terms of contact discharge performance. And thinner metal layer can also cause higher resistance and heat generated in the circuit, resulting in an integrated circuit in the HBM has poor performance and is more sensitive to ESD.

As a result, the external ESD protection device plays a very important first line of defense. Since the input/output connector of electronic products provides a path for ESD into the integrated circuit, especially the integrated circuit under constantly shrinking will make the sensitive device more easily be destroyed by ESD. Therefore, the input/output connector mounted ESD protection device and inhibiting ESD before ESD coupling into the circuit board are the most effective ways. To comply with USB and HDMI demand for higher speed and highly integrated automotive applications in the future, ESD protection device in addition to having a low turn-on voltage and low parasitic capacitance, one of the most important indicators is the clamping voltage. When the ESD event occurs, the lower clamping voltage can protect the integrated circuit inside the electronic products from destruction due to excessive voltage. Overall, the development trend is that ESD protection device can withstand higher levels of ESD in a smaller package size, and exhibit lower clamping voltage and on-resistance during ESD event in order to protect the increasingly sophisticated and highly integrated ICs.