PCIe, short for PCI-Express, is a standard for high-speed serial computer expansion interface that features high-speed serial two-way transmission and large bandwidth. It becomes one of the mainstream interface transmission standards. For system design, the accelerated development of SSD technology encourages the development of M.2 and NVMe connector for connection to SSD, in addition to the use as traditional PCIe slots for expansion cards or display cards. To keep the CPU frequency band limits from preventing the display cards and SSDs to perform their best, PCIe 4.0 was developed to answer the call.
PCIe 3.0 transmits data at 8Gb/s, while PCIe 4.0 doubles that rate at 16Gb/s, but still has the convenience of upward and downward compatibility, which is to say that PCIe 3.0 devices can be inserted in a PCIe 4.0 slot and vice versa. The doubled transmission rate, as shown in Fig. 1, reduces by half the number of channels that were originally needed for connection, and that provides greater flexibility for system design, as more channels are now available on CPU for connection with more devices, such as GPU and NVMe SSD. This eliminates a bottleneck for system design, and the direct connection of GPU or SSD to CPU gets rid of the impacts of delay to a great extent.
This article aims to explain the PCIe 4.0 solution. Looking at the future, Intel has announced to upgrade the PCIe interface on the Alder Lake-S platform to PCIe 5.0 from PCIe 4.0 on Rocket Lake. PCIe 4.0 is still the primary port for display card connection to CPU in the market, but Alder Lake-S is expected to provide PCIe5.0 supporting x16 for future display cards. On the other hand, x4 PCIe 4.0 is provided for NVMe SSD to appeal to desktop players and enable faster computer startup. For AMD, the support for PCIe 5.0 is expected to be seen on Zen 4 architecture.
Major CPU manufacturers race to upgrade their PCIe interfaces, which gives a boost for the performance of device connection as well as satisfies consumers’ needs for data streaming. In addition to consumer market, data centers and super computers require extreme data transmission. The needs in edge computing, AI and 5G network are immense. An astronomical number of servers are needed for data storage, in which a lot of NVMe SSDs are used. NVMe supports hot swap, which makes troubleshooting hard drive errors much easier for data center staff. However, this hot swap scenario brings the extreme threat of ESD surge to the system. Today’s SSDs transmit data directly to main chip through the PICe 4.0 NVMe connector. Currently, most of the main chips are manufactured in advanced 10nm process or less, and the chip damage in the system caused by the ESD surge becomes a huge headache for system manufacturers. In the traditional motherboard and desktop PC market, hardcore players often replace PCIe-interfaced devices, such as display card or network expansion card, on their own. Sometimes, ESD surge causes irreversible damage to internal chips through PCIe slot.
For an application like this, Amazing Microelectronic recommends the 5V 0201 solution, AZ5B75-01B, with PCIe4.0 Tx.Rx signal cable. The negligible parasitic capacitance ensures the transmission quality of PCIe 4.0 (see Fig. 2). In addition, there have been cases that PRSNT pins and PCIe_CLK pins were returned for repair recently, and AZ5B75-01B is also perfect for the two signals above. The incomparable clamping voltage (see Fig. 3) provides effective overall protection against electrostatic discharge at PCIe port, facilitating greater reliability for high-speed transmission applications.
PCIe 3.0 | PCIe 4.0 | |
Data Rate | 8 Gbit/s | 16 Gbit/s |
Band Width Needing Channels (Ex: 1.97 GB/s) | x2 | x1 |
Figure 1. PCIe data rates and electric properties
Figure 2. AZ5B75-01B capacitance-voltage measurement results
Figure 3. AZ5B75-01B TLP measurement results
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Reference: PCI-SIG